1. Field of the Invention
The present invention generally relates to the design and fabrication of semiconductor devices. Specifically, the present invention relates to a fuse for use in a semiconductor device, to methods of fabricating the fuse, and to a semiconductor device that includes the fuse. In particular, the present invention relates to a silicide fuse of a semiconductor device and to a semiconductor memory device that includes the silicide fuse. More particularly, the present invention relates to a semiconductor device that includes two diffusion regions disposed substantially within a well of opposite conductivity type, each of which communicates with an end of a metal silicide fuse.
2. Background of Related Art
Computers typically include devices that store data, such as memory devices. A first type of memory device is referred to as a read only memory (xe2x80x9cROMxe2x80x9d) device, in which data is permanently stored and cannot be overwritten or otherwise altered. Thus, ROM devices are useful whenever unalterable data or instructions are required. ROM devices are also nonvolatile devices, meaning that the data is not destroyed when power to these devices is shut off. ROM devices are typically programmed during their fabrication by making permanent electrical connections in selected portions of the memory device. One disadvantage of ROM devices is that their programming is permanently determined during fabrication and cannot, therefore, be changed. Thus, when new programming is desired, a ROM device must be newly configured to be wired in accordance with the desired program.
Another type of memory device is a programmable read only memory (xe2x80x9cPROMxe2x80x9d) device. Unlike ROM devices, PROM devices may be programmed after their fabrication. To render PROM devices programmable, some PROM devices are provided with an electrical connection in the form of a fusible link, which is also typically referred to as a fuse. A considerable number of fuse designs are known and employed in PROM devices. Exemplary fuse designs are disclosed in PROM Fuse Design Scales to Sub-0.25 Micron, Electronic Engineering Times, Sep. 29, 1997, p.4, in IEEE Transactions on Electron Devices, Vol. 33, No. 2, p.250-253 (February 1986), and in U.S. Pat. Nos. 5,672,905, 4,679,310, 5,264,725, 4,935,801, 4,670,970, 4,135,295, and 4,647,340.
An exemplary use of fuses in semiconductor devices has been in redundancy technology. Redundancy technology improves the fabrication yield of high-density semiconductor devices, such as static random access memory (xe2x80x9cSRAMxe2x80x9d) devices and dynamic random access memory (xe2x80x9cDRAMxe2x80x9d) devices, by facilitating the substitution of a redundant program circuit for a failed program circuit that could otherwise render the semiconductor device useless. The failed circuit may be bypassed and the redundant circuit activated or programmed by selectively programming, or xe2x80x9cblowing,xe2x80x9d fuses of the semiconductor device.
Fuses are perhaps the simplest and most compact means of programming a semiconductor memory device with a particular wiring scheme. Perhaps the most common fuse design is a conductive layer, typically comprising metal or polysilicon, which is narrowed or xe2x80x9cnecked downxe2x80x9d in one region. To blow the fuse, a relatively high electrical current, or programming current, is applied to the fuse. The programming current heats the metal or polysilicon of the fuse to a temperature above the melting point of the metal or polysilicon. As the fuse melts, the metal or polysilicon of the fuse xe2x80x9cblowsxe2x80x9d or becomes discontinuous, breaking the conductive link across the fuse. Typically, the fuse becomes discontinuous at the narrowed region since the material volume at the narrowed region is smaller than that of other portions of the fuse and, consequently, the current density is highest and the temperature increases most quickly at the narrowed region of the fuse. By selectively xe2x80x9cblowingxe2x80x9d the fuses of a PROM device, the PROM device is programmed to have a desired wiring scheme with conductive and substantially nonconductive fuses, thereby imparting each location of the PROM with a corresponding value of xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d representative of the conductivity state of the fuse (i.e., either conductive or substantially nonconductive), an array of which values comprises the data stored in the semiconductor device.
As an alternative to employing an electrical current to program a semiconductor device, a laser may be employed to blow selected fuses. The use of lasers to xe2x80x9cblowxe2x80x9d fuses has, however, become increasingly difficult as the size of the features of semiconductor devices, including the fuses thereof, decreases and as the density of features of semiconductor devices increases. Since the diameter of a laser beam should be smaller than the fuse pitch, the utility of laser beams to xe2x80x9cblowxe2x80x9d fuses begins to diminish with fuse pitches that are about the same or less than the diameters of conventional (e.g., about 5 microns) and state of the art laser beams.
As the programming current or laser beam intensity required to xe2x80x9cblowxe2x80x9d a conventional fuse may damage regions or structures of the semiconductor device proximate the fuse, conventional fuses are somewhat undesirable. Moreover, if the use of laser beams is desired to program the fuses of a semiconductor device, the fuse pitch and, thus, the density of structures on the semiconductor device may be limited.
When a metal fuse is disposed adjacent a doped silicon or doped polysilicon structure to bridge selected regions thereof, the resistance of the adjacent silicon or polysilicon may not differ significantly from the resistance of the fuse. Thus, upon xe2x80x9cblowingxe2x80x9d the fuse, the adjacent silicon or polysilicon may continue to transmit current similar to the current carried across an intact fuse. This is especially problematic when such a fuse is disposed adjacent a region, such as an n-well, of a semiconductor substrate conductively doped to have a first conductivity type to bridge two separate conductive wells, such as p-wells, of a second conductivity type, opposite the first conductivity type, disposed adjacent the region of first conductivity type. If the fuse xe2x80x9cblowsxe2x80x9d in a manner that leaves a section of a second, or outlet, side of the fuse that overlaps both a p-well and a portion of the common n-well, current may continue to pass into a p-well from a first side of the xe2x80x9cblownxe2x80x9d fuse, into the n-well, and out of the n-well to the portion of the second side of the xe2x80x9cblownxe2x80x9d fuse that overlaps the n-well. Thus, a fuse that blows in such a manner may undesirably conduct current having substantially the same characteristics as current conducted across an intact fuse.
Moreover, since electrically conductive metal silicide structures may be fabricated by annealing metal to an adjacent silicon or polysilicon structure, metal fuses that are disposed adjacent to silicon or polysilicon structures may conduct current even after being xe2x80x9cblown.xe2x80x9d This may occur if a high enough current is applied to the fuse or if the fuse is otherwise heated to a sufficient temperature to cause the metal of the fuse to anneal to the adjacent semiconductive material and to thereby form a metal silicide that may bridge the discontinuous portion of the fuse. The xe2x80x9cblownxe2x80x9d fuse may thus undesirably conduct current having substantially the same characteristics as current conducted across an intact fuse.
Accordingly, there is a need for a fuse that may be fabricated adjacent a semiconductive region of a state of the art semiconductor device and that, upon programming, or xe2x80x9cblowing,xe2x80x9d the fuse has a significantly different resistance than the previously intact fuse. There is also a need for a fuse that can be fabricated by known semiconductor device fabrication techniques.
The present invention generally provides a fuse for integrated circuits and semiconductors. The fuse of the present invention comprises a metal silicide layer with at least one terminal end thereof contacting an area of a semiconductor substrate that has been implanted with a dopant of a second conductivity type. A conductive region of the fuse, which is disposed adjacent the at least one terminal end, contacts another area of the semiconductor substrate that has been implanted with a dopant of a first conductivity type. The at least one terminal end and the conductive region of an intact fuse according to the present invention are joined by a narrowed region disposed over a boundary between the areas of first and second conductivity types. When sufficient current flows through the fuse, the metal silicide layer melts, agglomerates, or xe2x80x9cballs up,xe2x80x9d or otherwise ceases to conduct electrical current along the substantial length thereof, which results in an open circuit. This agglomeration preferably occurs at the narrowed region of the fuse.
Another embodiment of the semiconductor device and the fuse thereof includes a semiconductor substrate with two separate wells of a second conductivity type, preferably p-type, disposed in the semiconductor substrate, a common well of a first conductivity type, preferably an n-type conductivity, adjacent and disposed between the two separate wells, and a substantially flat metal silicide structure disposed adjacent the semiconductor substrate, with terminal ends of the metal silicide structure in communication with the two separate wells and a central, or conductive, region of the metal silicide structure disposed adjacent the common well. The semiconductor substrate may comprise p-type silicon. The common well is preferably a lightly doped region of the semiconductor substrate. The two separate wells comprise semiconductor material of a second conductivity type, which is opposite the first conductivity type, and are located within the common well and adjacent a surface of the substrate. The two separate wells are preferably highly doped.
The metal silicide of the fuse may comprise titanium silicide, tantalum silicide, tungsten silicide, molybdenum silicide, cobalt silicide, lead silicide, nickel silicide, platinum silicide, or any other metal silicide. Preferably, the metal silicide of the fuse comprises a refractory metal silicide. The metal silicide layer may include a necked-down region, or narrowed region, which is preferably narrower in width and has a smaller volume of conductive material than the terminal ends of the fuse, located between a terminal end through which current exits the fuse and the central region of the fuse.
Preferably, the narrowed region is disposed adjacent the interface between a second well of the two separate wells and the common well. Accordingly, as a programming current is applied to the fuse, the fuse will preferably become discontinuous adjacent the interface between the second well and the common well. Thus, a first remaining portion of the fuse will lie adjacent a first well of the two separate wells and the region of the n-well adjacent thereto, while a second portion of the discontinuous fuse will lie adjacent only the second well of the two separate wells. After the fuse has been blown, as current is applied to the fuse, the current will pass into the first of the two separate wells and, thus, into the common well through the first portion of the xe2x80x9cblownxe2x80x9d fuse. A diode, which exists at the interface between the second well of the two separate wells and the common well, which interface is also referred to as a p-n junction, as a depletion zone, as a boundary, or as a border, prevents electrical current from entering the second of the two separate wells through the common well. Accordingly, as the fuse is open, xe2x80x9cblown,xe2x80x9d or otherwise becomes discontinuous at the narrowed region thereof, the fuse will no longer conduct a significant amount of current and, therefore, an open circuit is created.
Since the fuse material comprises metal silicide, the fuse of the present invention inhibits reconnection of the fuse by growth of a metal silicide layer and, therefore, re-closing of the circuit is prevented.
The present invention also includes a method of fabricating a fuse and a semiconductor device according to the present invention. Preferably, the fuse is fabricated on a semiconductor substrate that includes two separate wells of a second conductivity type disposed within a lightly doped region, or common well, of a first, opposite conductivity type. A metal silicide structure may be fabricated on the substrate such that terminal ends of the fuse communicate with the two separate wells and a central portion of the metal silicide structure is adjacent the common well.
The semiconductor substrate may be a p-type silicon wafer. Accordingly, the method may include lightly doping a desired diffusion region of the substrate to impart the desired location of the common well with a first conductivity type (e.g., n-type) that is opposite the light, p-type conductivity of the semiconductor substrate. The lightly doped common well may be formed by implanting ions of the first conductivity type to a first concentration into selected portions of the semiconductor substrate. The desired locations of the two separate wells that are to be disposed adjacent or within the lightly doped common well may be doped to have an opposite conductivity type (e.g., p-type) than the common well. The two separate wells may be highly doped and may be formed by implanting ions of the opposite conductivity type to a second concentration, which is preferably higher than the first concentration.
The metal silicide structure may be fabricated by disposing a layer of metal, such as titanium, tantalum, tungsten, molybdenum, cobalt, lead, or platinum adjacent at least the common well and the two separate wells of the semiconductor substrate. A layer of silicon may also be disposed adjacent the layer of metal, if necessary, to fabricate a metal silicide structure of the desired configurations and dimensions. The layer of metal and the layer of silicon, if any, may be patterned to substantially the desired configuration of the metal silicide fuse. Preferably, the metal and silicon layers are patterned to define a fuse structure including a narrow, elongated conductive region, a narrowed region adjacent an end of the conductive region, and at least one terminal end that is wider than the narrowed region and disposed adjacent the narrowed region, opposite the conductive region. Alternatively, the fuse may be defined after a metal silicide layer has been formed. The layer of metal may be heated to anneal or otherwise react the metal with the silicon of either the substrate or an adjacent layer of silicon to form the metal silicide structure. Alternatively, a layer of metal silicide may be disposed adjacent the semiconductor substrate by other known processes, such as by chemical vapor deposition (xe2x80x9cCVDxe2x80x9d) techniques, then patterned to define the fuse.